A digital PLL with finite impulse responses

Conventional phase-locked loops (PLLs) lack speed, because ordinary phase comparators cannot provide time-continuous operation thus they act as a time delay to cause instability. In contrast, a completely time-discrete scheme, with a special voltage-controlled oscillator and a digital controller instead of usual low-pass filter, can respond in the fastest 2 cycles, but with overshoots of as large as 100%. This paper proposes in-between finite impulse responses of 3 and 4 cycles with overshoots of 50% and 33%, respectively, by using controllers with pole-zero cancellation. A prototype is implemented on an FPGA, based on a configuration devised to eliminate the otherwise inevitable adder