Integration of 8051 With DSP in Xilinx FPGA

This paper describes the integration of an 8-bit 8051 processor core with a general purpose 16-bit fixed-point digital signal processor core using the Xilinx Virtex-II FPGA. The modified IP cores were also integrated with RAM and ROM in one FPGA chip. The chip was programmed to run an application and tested to successfully work at a maximum clock speed of 80 MHz. The chip was designed using Verilog and developed in the Xilinx ISE Version 6.3i. Simulation was done in the ModelSim XE II Version 5.8c. The program development and circuit implementation of the chip demonstrated herein that simple ubiquitous tools like Visual Basic, a spreadsheet program, an 8051 assembler, Xilinx ISE and ModelSim can actually realized any moderate size IC design.