DocumentCode :
299232
Title :
DPCNN: a modular chip for large CNN arrays
Author :
Salerno, M. ; Sargeni, F. ; Bonaiuto, V.
Author_Institution :
Dipartimento di Ingegneria Elettronica, Rome Univ., Italy
Volume :
1
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
417
Abstract :
The VLSI implementation of Cellular Neural Networks is a relevant task which is very important for the future development of neural networks. In this paper a a modular VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks is presented. This chip is the first successfully tested fully programmable Cellular Neural Network hardware implementation. It covers most of the available one-neighborhood templates for image processing applications. Moreover, it has been designed to be easily interconnected to others to give very large CNN arrays
Keywords :
VLSI; cellular neural nets; image processing; image processing equipment; neural chips; DPCNN; cellular neural networks; digitally programmable networks; image processing applications; large CNN arrays; modular VLSI implementation; one-neighborhood templates; Cellular neural networks; Digital control; Electronic mail; Image processing; Neural network hardware; Neural networks; Testing; Transconductance; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
Type :
conf
DOI :
10.1109/ISCAS.1995.521539
Filename :
521539
Link To Document :
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