Test circuits for substrate noise evaluation in CMOS digital ICs

Author

Nagata, Makoto ; Ohmoto, Takafumi ; Nagai, Jin ; Morie, Takashi ; Iwata, Atsushi

Author_Institution

Fac. of Eng., Hiroshima Univ., Japan

fYear

2001

fDate

2001

Firstpage

13

Lastpage

14

Abstract

A Transition Controllable Noise Source (TCNS) generates substrate noises with controlled transitions in size, interstage delay, and direction. The noises are measured in a 100 ps 100 μV resolution by a linear substrate voltage detector that uses a front-end PMOS source follower probing substrate potential and a back-end latch comparator for sampling/digitizing the source follower output. A 0.4 μm CMOS test chip demonstrates the effectiveness of these circuits in performing advanced research on substrate noise

Keywords

CMOS digital integrated circuits; detector circuits; electric noise measurement; integrated circuit noise; integrated circuit testing; noise generators; test equipment; CMOS digital ICs; back-end latch comparator; front-end PMOS source follower; interstage delay; linear substrate voltage detector; source follower output digitizing; source follower output sampling; substrate noise evaluation; test circuits; transition controllable noise source; CMOS digital integrated circuits; Circuit noise; Circuit testing; Delay; Detectors; Noise generators; Noise measurement; Semiconductor device measurement; Size control; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific

Conference_Location

Yokohama

Print_ISBN

0-7803-6633-6

Type

conf

DOI

10.1109/ASPDAC.2001.913265

Filename

913265