Title :
An experimental study of N-detect scan ATPG patterns on a processor
Author :
Venkataraman, Srikanth ; Sivaraj, Srihari ; Amyeen, Enamul ; Lee, Sangbong ; Ojha, Ajay ; Guo, Ruifeng
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
This paper studies the impact of N-detect scan ATPG patterns on test quality and associated test costs. An incremental method for test generation is presented. Metrics to evaluate the richness of the test set are presented. The natural N-detect profiles of regular one-detect test sets and the impact to test data volume and test time of generating additional patterns is studied. Results are presented on an lntel® Pentium® 4 processor. Simulation results from evaluating the patterns on layout extracted and random bridges are presented. Silicon data from production test shows the effectiveness of N-detect tests.
Keywords :
automatic test pattern generation; fault simulation; iterative methods; microprocessor chips; production testing; ATPG scan patterns; fault simulation; lntel® Pentium® 4 processor; microprocessor chips; production test; silicon data; test quality; test set; test time; Automatic test pattern generation; Bridges; Costs; Data mining; Manufacturing; Production; Robustness; Silicon; Test pattern generators; Testing;
Conference_Titel :
VLSI Test Symposium, 2004. Proceedings. 22nd IEEE
Print_ISBN :
0-7695-2134-7
DOI :
10.1109/VTEST.2004.1299221
