Title :
Realtime wavelet video coder based on reduced memory accessing
Author :
Omaki, Roberto Y. ; Dong, Yu ; Miki, Morgan H. ; Furuie, Makoto ; Taki, Daisuke ; Tarui, Masaya ; Fujita, Gen ; Onoye, Takao ; Shirakawa, Isao
Author_Institution :
Dept. of Inf. Syst. Eng., Osaka Univ., Japan
Abstract :
In this paper, the VLSI implementation of a real-time EZW video coder is presented. The proposed architecture adopts a modified 2-D DWT subband decomposition scheme, with the purpose of reducing the transposition memory requirements of the 2-D DWT. In addition, through the use of a parallelized partial zerotree EZW scheme, temporary buffer requirements between the DWT and EZW modules are also reduced. The video encoder is integrated in a 0.35 μm 3LM CMOS technology by using 341 K transistors on a 4.93×4.93 mm2 die
Keywords :
CMOS digital integrated circuits; VLSI; digital signal processing chips; discrete wavelet transforms; real-time systems; video coding; 0.35 micron; 210 mW; 3.3 V; 33 MHz; 3LM CMOS technology; EZW video coder; VLSI implementation; modified 2D DWT subband decomposition scheme; parallelized partial zerotree EZW scheme; real-time wavelet video coder; reduced memory accessing; temporary buffer requirements reduction; transposition memory requirements reduction; Buffer storage; Discrete cosine transforms; Discrete wavelet transforms; Encoding; Frequency; Pixel; SDRAM; Throughput; Very large scale integration; Video compression;
Conference_Titel :
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-6633-6
DOI :
10.1109/ASPDAC.2001.913266
