Title :
Self-calibration technique for pipe-lined algorithmic A/D converters
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
fDate :
30 Apr-3 May 1995
Abstract :
An area efficient self-calibration technique for pipe-lined A/D converters is presented. It consists of trimming the reference voltage to each stage by means of a tunable MOSFET attenuator. This simplifies the calibration circuit in each stage and shift most of the calibration task to a hardware that is shared by all stages
Keywords :
analogue-digital conversion; calibration; pipeline processing; area efficiency; calibration circuit; hardware; pipelined algorithmic A/D converters; reference voltage trimming; self-calibration; tunable MOSFET attenuator; Arithmetic; Calibration; Capacitors; Circuit optimization; Clocks; Instruments; Linearity; Tunable circuits and devices; Virtual reality; Voltage;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.521609
