DocumentCode
2992928
Title
Programming techniques for PA3architectures
Author
Venkateswaran, N. ; Prabhu, K.M.M.
Author_Institution
Indian Institute of Technology, Madras, India
Volume
10
fYear
1985
fDate
31138
Firstpage
1376
Lastpage
1379
Abstract
A novel VLSI architecture, PA3(Programmable Array of Array Adders) is introduced in depth in [1,2]. The concept of PA3architecture is a major attempt towards the realization of an efficient and effective universal mask/field programmable VLSI macrocell structure for special-purpose, as well as general purpose, system implementations. This leads to several advantages over the conventional VLSI architectures. An integrated database system describing the logic model and circuit model (macro) of the-PA3macrocell, with regard to layout model, is presented in [1]. The objective of this paper is to discuss the programming techniques-for PA3arrays to realize functional systems. Programming the PA3arrays is achieved by direct mapping of Boolean expressions, describing the functional systems to be implemented using these expandable arrays. This mapping can be performed either manually (resulting in better chip area usage) or through a PA3compiler.
Keywords
Adders; Computer architecture; Database systems; Functional programming; Logic circuits; Logic programming; Macrocell networks; Programmable logic arrays; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '85.
Type
conf
DOI
10.1109/ICASSP.1985.1168280
Filename
1168280
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