DocumentCode :
2993676
Title :
Balanced truncation with spectral shaping for RLC interconnects
Author :
Heydari, Payam ; Pedram, Massoud
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
2001
fDate :
2001
Firstpage :
203
Lastpage :
208
Abstract :
This paper presents a numerically stable and efficient algorithm for model reduction of large RLC networks using a frequency-weighted balanced truncation technique. The salient features of this algorithm include guaranteed stability of the reduced transfer function as well as availability of provable frequency-weighted error bounds. Such frequency weighting is essential to provide better control over time-domain error of the reduced system. The first k largest singular values of the system are obtained using the Lanczos algorithm, and the Lyapunov equations are solved by an iterative Lyapunov equation solver. Experimental results demonstrate the higher accuracy of our technique compared to Krylov-subspace-based model reduction techniques and other truncated balanced realizations that do not use spectral shaping. Based on MATLAB simulations, the run-time of our method is only 5% more than that of PRIMA
Keywords :
Lyapunov matrix equations; VLSI; circuit analysis computing; circuit layout CAD; distributed parameter networks; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; iterative methods; linear network analysis; numerical stability; reduced order systems; transfer functions; Lanczos algorithm; Lyapunov equations; MATLAB simulations; RLC interconnects; frequency-weighted balanced truncation technique; frequency-weighted error bounds; iterative Lyapunov equation solver; large RLC networks; model reduction; numerically stable algorithm; reduced transfer function; spectral shaping; time-domain error; Control systems; Equations; Error correction; Frequency; Iterative algorithms; MATLAB; Reduced order systems; Stability; Time domain analysis; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-6633-6
Type :
conf
DOI :
10.1109/ASPDAC.2001.913305
Filename :
913305
Link To Document :
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