Title :
The Tangram framework: asynchronous circuits for low power
Author :
Kessels, Joep ; Peeters, A.D.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
Asynchronous CMOS circuits have the potential for very low power consumption, because they only dissipate when and where active. In addition they have favorable EMC properties, since they emit less energy, which in addition is evenly distributed over the spectrum. The Tangram framework supports the design of asynchronous circuits in a high-level programming language. Using this framework we have designed several chips, for instance for pagers and smart cards, which are clearly superior to synchronous designs
Keywords :
CMOS logic circuits; asynchronous circuits; circuit CAD; electromagnetic compatibility; logic CAD; low-power electronics; CMOS circuits; EMC properties; Tangram framework; asynchronous circuits; high-level programming language; low power; pagers; smart cards; Asynchronous circuits; Clocks; Computer languages; Electromagnetic compatibility; Energy consumption; Laboratories; Registers; Smart cards; Timing; Very large scale integration;
Conference_Titel :
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-6633-6
DOI :
10.1109/ASPDAC.2001.913315