DocumentCode
2994020
Title
Highly concurrent architectures for recursive median filters
Author
Chakrabarti, Chaitali ; Lucke, Lori
Author_Institution
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA
fYear
1993
fDate
20-22 Oct 1993
Firstpage
471
Lastpage
479
Abstract
The authors present highly concurrent (i) array architectures (ii) stack filter architectures and (iii) sorting network architectures for recursive median filters. In order to pipeline these architectures to any level, the authors develop clustered look ahead and scattered look ahead realizations of the recursive median filters. These realizations are based on approximating the recursive median filter with a weighted recursive median filter. New array architectures and stack filter architectures are developed for weighted recursive median filters that support clustered look ahead, and new sorting network architectures for weighted recursive median filters that support scattered look ahead. These architectures can be pipelined to any level with a corresponding linear increase in the hardware complexity. In addition, these architectures can also be used to implement the larger class of weighted order statistic filters
Keywords
VLSI; array signal processing; median filters; pipeline processing; recursive filters; systolic arrays; VLSI; array architectures; clustered look ahead; hardware complexity; highly concurrent; pipelined; recursive median filters; scattered look ahead; semi-systolic linear arrays; sorting network architectures; stack filter architectures; weighted order statistic filters; weighted recursive median filter; Delay; Digital filters; Feature extraction; Filtering algorithms; Hardware; Nonlinear filters; Pipeline processing; Scattering; Sorting; Statistics;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location
Veldhoven
Print_ISBN
0-7803-0996-0
Type
conf
DOI
10.1109/VLSISP.1993.404458
Filename
404458
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