• DocumentCode
    2994341
  • Title

    Improved crosstalk modeling for noise constrained interconnect optimization

  • Author

    Gong, Jianya ; Pan, David Zhigang ; Srinivas, Prasanna V.

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    373
  • Lastpage
    378
  • Abstract
    This paper presents a much improved, highly accurate yet efficient crosstalk noise model, the 2-π model, and applies it to noise-constrained interconnect optimizations. Compared with previous crosstalk noise models of similar complexity, our 2-π model takes into consideration many key parameters, such as coupling locations (near-driver or near-receiver), and the coarse distributed RC characteristics for victim net. Thus, it is very accurate (less than 6% error on average compared with HSPICE simulations). Moreover, our model provides simple closed-form expressions for both peak noise amplitude and noise width, so it is very useful for noise-aware layout optimizations. In particular we demonstrate its effectiveness in two applications: (i) optimization rule generation for noise reduction using various interconnect optimization techniques, (ii) simultaneous wire spacing to multiple nets for noise constrained interconnect minimization
  • Keywords
    circuit optimisation; crosstalk; distributed parameter networks; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; minimisation; 2π model; closed-form expressions; coupling locations; crosstalk modeling; crosstalk noise model; distributed RC characteristics; multiple nets; noise constrained interconnect minimization; noise constrained interconnect optimization; noise reduction; noise-aware layout optimizations; optimization rule generation; peak noise amplitude; peak noise noise width; simultaneous wire spacing; Circuit noise; Closed-form solution; Constraint optimization; Crosstalk; Design automation; Design optimization; Integrated circuit interconnections; Noise level; Noise reduction; Semiconductor device noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-6633-6
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2001.913335
  • Filename
    913335