Approximate analysis of average performance of (σ,ρ) regulators

A study is made of the average delay and the blocking probability of a regulator with a finite buffer size fed with Poisson and batch Poisson streams. The blocking probability depends only on σ and B through σ+B where B is the buffer size and σ is expressed as an integer multiple of the packet size. The provision of regulator buffers allows flexibility in the traffic control such that incoming traffic can be delayed during minor overloads and rejected during major overloads. In addition, the provision of regulator buffers allows the use of smaller network buffers, which are typically more expensive due to high-speed operation. Also studied is the packet departure process from the regulator. A four-parameter descriptor (σ,ρ, C_a²,λ) is proposed to characterize the output process of the regulator. In addition, formulas are proposed to construct the four-parameter descriptor for the output process of the multiplexer. Such descriptors may be useful in multihop situations. Simulation results indicate that the proposed approximations are close to the simulated values