DocumentCode
2994513
Title
Communication-Aware Design Space Exploration for Efficient Run-Time MPSoC Management
Author
Singh, Amit Kumar ; Kumar, Akash ; Jigang, Wu ; Srikanthan, Thambipillai
Author_Institution
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
fYear
2011
fDate
9-11 Dec. 2011
Firstpage
72
Lastpage
76
Abstract
Real-time multi-media applications are increasingly mapped on modern embedded systems based on Multiprocessor Systems-on-Chip (MPSoCs). Tasks of the applications need to be mapped on the MPSoC resources efficiently in order to satisfy their performance constraints. Exploring all the mappings, i.e. tasks to resources combinations exhaustively may take days or weeks. Additionally, the exploration is performed at design-time that cannot handle dynamism in applications and resources´ status. A run-time mapping technique can cater for the dynamism but cannot guarantee for strict timing deadlines due to large computations involved at run-time. Thus, an approach performing feasible compute intensive exploration at design-time and using the explored results at run-time is required. This paper presents a solution in the same direction. Communication-aware design space exploration techniques have been proposed to explore different mapping options to be selected at run-time subject to desired performance and available MPSoC resources. Experiments show that the proposed techniques for exploration are faster over an exhaustive exploration and provides almost the same quality of results.
Keywords
embedded systems; multimedia communication; multiprocessing systems; performance evaluation; system-on-chip; MPSoC resource; communication aware design space exploration; design time; modern embedded system; multiprocessor system on chip; performance constraints; real time multimedia application; run time MPSoC management; run time mapping technique; Educational institutions; Equations; Hardware; Mathematical model; Space exploration; Throughput; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures, Algorithms and Programming (PAAP), 2011 Fourth International Symposium on
Conference_Location
Tianjin
Print_ISBN
978-1-4577-1808-3
Type
conf
DOI
10.1109/PAAP.2011.18
Filename
6128479
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