DocumentCode :
2994674
Title :
Functional extension of structural logic optimization techniques
Author :
Espejo, J.A. ; Entrena, L. ; Millán, E. San ; Olías, E.
Author_Institution :
Carlos III Univ., Madrid, Spain
fYear :
2001
fDate :
2001
Firstpage :
467
Lastpage :
472
Abstract :
This work provides a generalization of structural logic optimization methods to general Boolean networks. With this generalization, the nodes of the network are no longer restricted to simple gates and can be functions of any size. Within this framework, we present necessary and sufficient conditions to identify all the possible functional expansions of a node that allow one to eliminate a wire elsewhere in the network. These conditions are also given for the case of multiple variable expansion, providing an incremental mechanism to perform functional transformations involving any number of variables that can be applied in a very efficient manner. On the other band, we will show in this paper that relevant simplifications can be obtained when this framework is applied to the particular case of AND-OR-NOT networks, resulting in important savings in the computational effort. When compared to previous approaches, the experimental results show an important reduction in the number of computations required
Keywords :
Boolean functions; circuit optimisation; logic CAD; logic gates; observability; AND-OR-NOT networks; computational effort; functional expansions; functional transformations; general Boolean networks; multiple variable expansion; structural logic optimization techniques; Automatic test pattern generation; Boolean functions; Computer networks; Electronic mail; Iterative methods; Logic; Optimization methods; Sufficient conditions; Testing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-6633-6
Type :
conf
DOI :
10.1109/ASPDAC.2001.913352
Filename :
913352
Link To Document :
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