DocumentCode
2994698
Title
An exact methodology for scheduling in a 3D design space
Author
Chaudhuri, Samit ; Blythe, Stephen A. ; Walker, Robert A.
Author_Institution
Dept. of Electr. Comput. & Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA
fYear
1995
fDate
13-15 Sep 1995
Firstpage
78
Lastpage
83
Abstract
This paper describes an exact solution methodology, implemented in Rensselaer´s Voyager design space exploration system, for solving the scheduling problem in a 3-dimensional (3D) design space: the usual 2D design space (which trades off area and schedule length), plus a third dimension representing clock length. Unlike design space exploration methodologies which rely on bounds or estimates, this methodology is guaranteed to find the globally optimal solution to the 3D scheduling problem. Furthermore, this methodology efficiently prunes the search space, eliminating provably inferior design points through: a careful selection of candidate clock lengths; and tight bounds on the number of functional units of each type or on the schedule length
Keywords
clocks; high level synthesis; network synthesis; optimisation; scheduling; search problems; 2D design space; 3D design space; 3D scheduling problem; Voyager design space exploration system; candidate clock lengths; clock length; globally optimal solution; high level synthesis; schedule length; scheduling; search space pruning; three dimensional scheduling; three-dimensional design space; tight bounds; two dimensional design space; Algorithm design and analysis; Clocks; Delay; High level synthesis; Logic; Optimal scheduling; Process design; Processor scheduling; Scheduling algorithm; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
System Synthesis, 1995., Proceedings of the Eighth International Symposium on
Conference_Location
Cannes
ISSN
1080-1820
Print_ISBN
0-8186-7076-2
Type
conf
DOI
10.1109/ISSS.1995.520616
Filename
520616
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