DocumentCode
2995205
Title
Built-In Self-Test for multipliers in Altera Cyclone II Field Programmable Gate Arrays
Author
Lusco, Michael A. ; Dailey, Justin L. ; Stroud, Charles E.
Author_Institution
Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA
fYear
2011
fDate
14-16 March 2011
Firstpage
214
Lastpage
219
Abstract
This paper describes a Built-In Self-Test (BIST) approach designed to verify the integrity of the embedded multiplier cores in Altera Cyclone II Field Programmable Gate Arrays (FPGAs). This approach uses an architecture independent test algorithm implemented with parameterized VHDL to support all FPGAs in the Cyclone II family. The BIST is capable of detecting faults within all of the multiplier´s modes of operation in three downloads and can identify the location of faulty multiplier(s).
Keywords
built-in self test; fault location; field programmable gate arrays; hardware description languages; multiplying circuits; Altera Cyclone II; FPGA; architecture independent test algorithm; built-in self test; embedded multiplier core; faulty multiplier location; field programmable gate arrays; parameterized VHDL; Built-in self-test; Circuit faults; Cyclones; Field programmable gate arrays; Pipelines; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
System Theory (SSST), 2011 IEEE 43rd Southeastern Symposium on
Conference_Location
Auburn, AL
ISSN
0094-2898
Print_ISBN
978-1-4244-9594-8
Type
conf
DOI
10.1109/SSST.2011.5753809
Filename
5753809
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