DocumentCode :
2996135
Title :
Hardware architecture for data concealment using sub-band coding, LSB coding and pseudo-random bit stream generators
Author :
Adi, Robertus W. ; Tio, Cedric M M ; McLoughlin, I.V.
Author_Institution :
Sch. of Comput. Eng., Nanyang Technol. Inst., Singapore
fYear :
2000
fDate :
2000
Firstpage :
159
Lastpage :
162
Abstract :
Data concealment using LSB coding is a simple algorithm for hiding data within audio. This paper firstly extends the algorithm to alleviate frequency offset effects, then applies the technique to a multi-rate filterbank, and reports the results of a VLSI implementation for the system. The architecture has been designed to give real time performance and consequently has high efficiency, whilst maintaining audio fidelity through careful analysis of wordlength and other effects. In this paper, we also consider the feasibility of the selected implementation approach
Keywords :
VLSI; audio coding; copy protection; digital filters; digital signal processing chips; message authentication; pipeline processing; DSP chip; LSB coding; VLSI implementation; audio fidelity; audio signal hidden data; data concealment; frequency offset effects; hardware architecture; multi-rate filterbank; pipelined architecture; pseudo-random bit stream generators; real time performance; sub-band coding; Clocks; Computer architecture; Data encapsulation; Data engineering; Filter bank; Hardware; Sampling methods; Signal design; Signal processing algorithms; Streaming media;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. IEEE APCCAS 2000. The 2000 IEEE Asia-Pacific Conference on
Conference_Location :
Tianjin
Print_ISBN :
0-7803-6253-5
Type :
conf
DOI :
10.1109/APCCAS.2000.913431
Filename :
913431
Link To Document :
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