A new class of Steiner tree heuristics with good performance: the iterated 1-Steiner approach

Virtually all previous methods for the rectilinear Steiner tree problem begin with a minimum spanning tree topology and rearrange edges to induce Steiner points. This study presents a more direct approach: the authors iteratively find optimal Steiner points to be added to the layout. The method gives improved average-case performance, and also avoids the worst-case examples of existing approaches. Sophisticated computational geometry techniques allow efficient and practical implementation, and the method is naturally suited to real-world VLSI regimes where, e.g., via costs can be high. Extensive performance results show almost 3% wirelength reduction over the best existing methods. A number of variants and extensions are described.<>