DocumentCode :
2996312
Title :
Compatible class encoding in Roth-Karp decomposition for two-output LUT architecture
Author :
Juinn-Dar Huang ; Jing-Yang Jou ; Wen-Zen Shen
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
1995
fDate :
5-9 Nov. 1995
Firstpage :
359
Lastpage :
363
Abstract :
Roth-Karp decomposition is one of the most popular techniques for LUT-based FPGA technology mapping because it can decompose a node into a set of nodes with fewer numbers of fanins. In this paper, we show how to formulate the compatible class encoding problem in Roth-Karp decomposition as a symbolic-output encoding problem in order to exploit the feature of the two-output LUT architecture. Based on this formulation, we also develop an encoding algorithm to minimize the number of LUT´s required to implement the logic circuit. Experimental results show that our encoding algorithm can produce promising results in the logic synthesis environment for the two-output LUT architecture.
Keywords :
circuit CAD; field programmable gate arrays; integrated circuit design; logic CAD; logic design; table lookup; Roth-Karp decomposition; compatible class encoding; logic synthesis environment; lookup-table based field programmable gate array technology mapping; symbolic-output encoding problem; two-output look-up table architecture; Application specific integrated circuits; Circuit synthesis; Complexity theory; Encoding; Field programmable gate arrays; Logic circuits; Logic devices; Programmable logic arrays; Prototypes; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-8186-8200-0
Type :
conf
DOI :
10.1109/ICCAD.1995.480141
Filename :
480141
Link To Document :
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