• DocumentCode
    2996545
  • Title

    Design and VLSI implementation of a concurrent solver for N coupled least-squares fitting problems

  • Author

    Deprettere, Ed F. ; Jainandunsing, Kishan

  • Author_Institution
    Delft University of Technology, Delft, Netherlands
  • Volume
    10
  • fYear
    1985
  • fDate
    31138
  • Firstpage
    200
  • Lastpage
    203
  • Abstract
    In this paper we report on the design of a high-speed VLSI system-solver for solving a set of systems of linear equations in fixed point arithmetic, concurrently and in real-time. The systems originate from a speech coding least-squares fitting problem. They are strongly coupled and can be jointly solved, when properly nested, by a recursive algorithm. This algorithm has a computational complexity not greater than in case of a single system with multiple inhomogeneous terms. The algorithm exhibits sufficient structure and concurrency, which are exploited for its mapping on a fast VLSI system-solver. The mapping is carried out systematically by a strict-hierarchical temporal and local decomposition of the algorithm. Estimates show that the solver fits on 3 VLSI chips, each of size 6.5 × 6.5 mm2. Two of these are pipelined CORDICs, the third is a FIFO-type memory chip. The expected robust behavior of the design has been confirmed through simulations at the register level.
  • Keywords
    Computer architecture; Difference equations; Pipeline processing; Tellurium; Time factors; Timing; Very large scale integration; Virtual machining;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '85.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1985.1168483
  • Filename
    1168483