DocumentCode
2996577
Title
Design and emulation of 4×4 ATM integrated switching unit
Author
Zhang, Yaqi ; Cao, Xiaojian ; Liu, Yu ; Ma, Fenghua
Author_Institution
Sch. of Electron. & Inf. Eng., Tianjin Univ., China
fYear
2000
fDate
2000
Firstpage
239
Lastpage
242
Abstract
For an ATM switching unit the buffering and queuing of cells are a key problem. In this paper A hierarchic 4×4 integrated ATM switching unit is designed and emulated on Xilinx Foundation Software. In the design the technique of combining the state dependent principle and the cyclic principle is adopted. For cell queuing the state dependent principle is a first priority, and the cyclic principle is applied if the buffers are in the same status. The explicit forward congestion notification is adopted in traffic control
Keywords
asynchronous transfer mode; electronic switching systems; telecommunication computing; ATM integrated switching unit; Xilinx Foundation Software; cell buffering; cell queuing; cyclic principle; explicit forward congestion notification; hierarchic 4×4 switching unit; state dependent principle; traffic control; Access protocols; Asynchronous transfer mode; Bandwidth; Communication networks; Communication switching; Emulation; ISDN; Image communication; Software design; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. IEEE APCCAS 2000. The 2000 IEEE Asia-Pacific Conference on
Conference_Location
Tianjin
Print_ISBN
0-7803-6253-5
Type
conf
DOI
10.1109/APCCAS.2000.913477
Filename
913477
Link To Document