DocumentCode :
2996613
Title :
Performance Benefits of Heterogeneous Computing in HPC Workloads
Author :
Lee, Victor W. ; Grochowski, Ed ; Geva, Robert
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fYear :
2012
fDate :
21-25 May 2012
Firstpage :
16
Lastpage :
26
Abstract :
Chip multi-processors (CMPs) with increasing number of processor cores are now becoming widely available. To take advantage of many-core CMPs, applications must be parallelized. However, due to the nature of algorithm/programming model, some parts of the application would remain serial. According to Amdahl´s law, the speedup of a parallel application is limited by the amount of serial execution it has. For a CMP with many cores, this can be a serious limitation. To take full advantage of the increasing number of cores, one must try to reduce the execution time of the serial portion of a parallel program. However, rewriting an application takes time and often the return on the effort invested may not justify parallelizing every part of the program. Heterogeneous many-core CMP design is one possible solution to support massive parallel execution and to provide a reasonable single-thread performance. In this paper, we use a simple spreadsheet model to evaluate homogeneous and heterogeneous CMP designs using execution profiles of real HPC applications. Evaluated on 12 parallel HPC applications, we show that heterogeneous CMPs can outperform homogeneous CMPs by up to 1.35× with an average speedup of 1.06× when both the heterogeneous CMPs and homogeneous CMPs are constrained to use the same power budget. Our study found the heterogeneous CMPs can take advantage of serial portion of execution that is as little as 2% of total run time to provide performance benefit. This suggests heterogeneous computing can help mitigate the effect of not parallelizing some portions of an application due to return on investment concern on programming efforts.
Keywords :
microprocessor chips; multiprocessing systems; parallel processing; performance evaluation; Amdahl law; CMP; HPC workloads; chip multiprocessors; heterogeneous computing; parallel application; parallel execution; parallel program; performance benefits; processor cores; single thread performance; spreadsheet model; Benchmark testing; Computational modeling; Instruction sets; Power demand; Servers; Throughput; Transistors; Chip multi-processors (CMPs); HPC; heterogeneous computing; parallel programs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2012 IEEE 26th International
Conference_Location :
Shanghai
Print_ISBN :
978-1-4673-0974-5
Type :
conf
DOI :
10.1109/IPDPSW.2012.18
Filename :
6270624
Link To Document :
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