• DocumentCode
    2996617
  • Title

    Efficient Building Blocks for Reversible Sequential Circuit Design

  • Author

    Hari, Siva Kumar Sastry ; Shroff, Shyam ; Mahammad, Sk.Noor ; Kamakoti, V.

  • Author_Institution
    Reconfigurable and Intelligent Systems Engineering Group, Department of Computer Science and Engineering, Indian Institute of Technology, Madras, Chennai - 600 036, India.
  • Volume
    1
  • fYear
    2006
  • fDate
    6-9 Aug. 2006
  • Firstpage
    437
  • Lastpage
    441
  • Abstract
    Reversible logic is gaining interest in the recent past due to its less heat dissipating characteristics. It has been proved that any Boolean function can be implemented using reversible gates. In this paper we propose a set of basic sequential elements that could be used for building large reversible sequential circuits leading to logic and garbage reduction by a factor of 2 to 6 when compared to existing reversible designs reported in the literature.
  • Keywords
    Boolean functions; Circuit synthesis; Design engineering; Energy dissipation; Intelligent structures; Intelligent systems; Logic circuits; Logic design; Logic gates; Sequential circuits; Flip-Flop; Garbage; Power Dissipation; Reversible Gate; Reversible Logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
  • Conference_Location
    San Juan, PR
  • ISSN
    1548-3746
  • Print_ISBN
    1-4244-0172-0
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2006.382092
  • Filename
    4267169