DocumentCode
2997072
Title
Fixed-Point CORDIC-Based QR Decomposition by Givens Rotations on FPGA
Author
Chen, Dongdong ; Sima, Mihai
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Victoria, Victoria, BC, Canada
fYear
2011
fDate
Nov. 30 2011-Dec. 2 2011
Firstpage
327
Lastpage
332
Abstract
This paper presents a parallel architecture of an QR decomposition systolic array based on the Givens rotations algorithm on FPGA. The proposed architecture adopts a direct mapping by 21 fixed-point CORDIC-based process units that can compute the QR decomposition for an 4×4 real matrix. In order to achieve a comprehensive resource and performance evaluation, the computational error analysis, the resource utilized, and speed achieved on Virtex5 XC5VTX150T FPGA, are evaluated with the different precision of the intermediate word lengthes. The evaluation results show that 1) the proposed systolic array satisfies 99.9% correct 4×4 QR decomposition for the 2-13 accuracy requirement when the word length of the data path is lager than 25-bit, 2) occupies about 2, 810 (13%) slices, and achieves about 2.06 M/sec updates by running at the maximum frequency 111 MHz.4x4 real matrix.
Keywords
field programmable gate arrays; fixed point arithmetic; matrix decomposition; parallel architectures; FPGA; QR decomposition systolic array; computational error analysis; fixed-point CORDIC-based QR decomposition; matrix factorization; parallel architecture; Accuracy; Arrays; Field programmable gate arrays; Hardware; Matrix decomposition; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on
Conference_Location
Cancun
Print_ISBN
978-1-4577-1734-5
Type
conf
DOI
10.1109/ReConFig.2011.38
Filename
6128598
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