DocumentCode
2997156
Title
A study of pulsed laser planarization of aluminum for VLSI metallization
Author
Liu, Ruichen ; Cheung, K.P. ; Lai, W.Y.C. ; Heim, R.
Author_Institution
AT&T Bell Labs., Murray Hill, NJ, USA
fYear
1989
fDate
12-13 Jun 1989
Firstpage
329
Lastpage
335
Abstract
Pulsed laser melting of Al to improve the contact via coverage in VLSI metallization has been investigated for various laser fluences and substrate temperatures. The authors have characterized how the Al flow phenomenon progresses: from melting (recrystallization and grain growth) to planarization (via covered but not necessarily filled), then to via-fill (solidly plugged), and finally from localized to systematic ablation (material loss). The laser energy densities for these conditions have been quantified and the useful range for VLSI application extracted. Without antireflective coating, the process window is ±6-8% for 0.5-μm Al film to fill a 1-μm via with a vertical wall. Localized ablation of the Al film at the high energy limit has been found to be the key factor that controls the process window. This limitation can be explained by the estimated temperature rise of the Al film from melting to planarization and via-fill conditions: very high at 400-500°C and 700-800°C above the melting temperature, respectively. The issues of VLSI applications such as pattern density sensitivity and device integrity have been examined
Keywords
VLSI; aluminium; laser beam applications; metallisation; 0.5 micron; 1 micron; Al flow phenomenon; Al metal laser melting; VLSI metallization; ablation; antireflective coating; contact via coverage; device integrity; grain growth; high energy limit; laser energy densities; laser fluences; limitation; melting; metallisation planarisation; multilevel interconnection; pattern density sensitivity; process window; pulsed laser melting; pulsed laser planarization; recrystallization; substrate temperatures; via filling; Aluminum; Coatings; Laser ablation; Metallization; Optical materials; Optical pulses; Planarization; Substrates; Temperature sensors; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Multilevel Interconnection Conference, 1989. Proceedings., Sixth International IEEE
Conference_Location
Santa Clara, CA
Type
conf
DOI
10.1109/VMIC.1989.77992
Filename
77992
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