• DocumentCode
    2997196
  • Title

    First Intel Low-Cost IA Atom-based System-On-Chip for Nettop/Netbook

  • Author

    Sutanthavibul, S. ; Perabala, Suresh Kumar

  • Author_Institution
    Intel Microelectron., Bayan Lepas, Malaysia
  • fYear
    2009
  • fDate
    15-16 July 2009
  • Firstpage
    88
  • Lastpage
    91
  • Abstract
    The paper describes a design IP-reuse methodology used in a new Intel low cost IA (LCIA) system-on-chip (SoC) design, call Pineview (PNV). The PNV SoC is used in the next generation Intel Nettop/Netbook platform. The SoC chip integrates several Intel internal intellectual property (IP) blocks on the same die: mainly two Atom CPU cores, a graphic engine, a memory controller, and IO interfaces. The IP-reuse methodology provides high design efficiency and productivity. It also allows flexibility and customization for lower power consumption and a floorplan optimization needed for the Nettop/Netbook market segment. The paper also provides an overview of the PNV based Nettop/Netbook platform architecture. It also explains IP-reuse methodology and full chip integration which is performed by a design team in Intel Penang design center.
  • Keywords
    industrial property; logic design; system-on-chip; IO interfaces; IP-reuse methodology design; Intel Penang design center; Intel internal intellectual property; Intel low-cost IA atom-based system-on-chip; Nettop-Netbook; floorplan optimization; full chip integration; graphic engine; low power consumption; memory controller; Bills of materials; Chip scale packaging; Costs; Design methodology; Energy consumption; Graphics; Internet; Microelectronics; Product design; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-4952-1
  • Electronic_ISBN
    978-1-4244-4952-1
  • Type

    conf

  • DOI
    10.1109/ASQED.2009.5206293
  • Filename
    5206293