DocumentCode :
2997221
Title :
Rectangle-packing-based module placement
Author :
Murata, H. ; Fujiyoshi, K. ; Nakatake, S. ; Kajitani, Y.
Author_Institution :
Sch. of Inf. Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
fYear :
1995
fDate :
5-9 Nov. 1995
Firstpage :
472
Lastpage :
479
Abstract :
The first and the most critical stage in VLSI layout design is the placement, the background of which is the rectangle packing problem: Given many rectangular modules of arbitrary site, place them without overlapping on a layer in the smallest bounding rectangle. Since the variety of the packing is infinite (two-dimensionally continuous) many, the key issue for successful optimization is in the introduction of a P-admissible solution space, which is a finite set of solutions at least one of which is optimal. This paper proposes such a solution space where each packing is represented by a pair of module name sequences. Searching this space by simulated annealing, hundreds of modules could be successfully packed as demonstrated. Combining a conventional wiring method, the biggest MCNC benchmark ami49 is challenged.
Keywords :
VLSI; circuit layout CAD; modules; simulated annealing; MCNC benchmark ami49; P-admissible solution space; VLSI layout design; module name sequences; rectangle-packing-based module placement; simulated annealing; smallest bounding rectangle; solution space; Circuit simulation; Design engineering; Information science; NP-hard problem; Production; Simulated annealing; Very large scale integration; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-8186-8200-0
Type :
conf
DOI :
10.1109/ICCAD.1995.480159
Filename :
480159
Link To Document :
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