DocumentCode
2997243
Title
Detecting Data Hazards in Multi-Processor System-on-Chips on FPGA
Author
Wang, Chao ; Li, Xi ; Chen, Peng ; Feng, Xiaojing ; Zhang, Junneng ; Zhou, Xuehai
Author_Institution
Sch. of Comput. Sci., Univ. of Sci. & Technol. of China, Hefei, China
fYear
2012
fDate
21-25 May 2012
Firstpage
282
Lastpage
287
Abstract
This paper presents a novel data hazards detecting engine, task score boarding, which applies instruction level score boarding algorithm to reconfigurable MPSoC on FPGA for out-of-order task execution. Task score boarding can detect inter-task data dependencies and then assign tasks to different processors or IP cores automatically. When the computing resources are sufficient and no data dependences, task score boarding allows tasks to execute out of order. We implemented the prototype system on a state-of-the-art Virtex5 FPGA board. Experimental results on sample applications demonstrated that the task score boarding can achieve more than 97% of theoretical speedup, which shows it can largely uncover task level parallelism.
Keywords
field programmable gate arrays; logic circuits; multiprocessing systems; system-on-chip; FPGA; IP cores; MPSoC; Virtex5; data hazards detection; instruction level score boarding; multi-processor system-on-chips; task score boarding; Field programmable gate arrays; Hardware; Hazards; IP networks; Out of order; Parallel processing; data hazard; out-of-order execution; scoreboarding; task level parallelism;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2012 IEEE 26th International
Conference_Location
Shanghai
Print_ISBN
978-1-4673-0974-5
Type
conf
DOI
10.1109/IPDPSW.2012.33
Filename
6270652
Link To Document