DocumentCode :
2997441
Title :
A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters
Author :
Kadivar, S.R. ; Schmitt-Landsiedel, D. ; Klar, H.
Author_Institution :
Res. & Dev., Siemens AG, Munich, Germany
fYear :
1995
fDate :
5-9 Nov. 1995
Firstpage :
554
Lastpage :
561
Abstract :
This paper presents a new algorithm to attain optimized network scaling in single loop, 1 bit Sigma Delta Analog 1d Digital Converters (SD ADC) of order three or more. The algorithm is based on a novel mathematical description of stability and performance criteria of the SD ADC and on the application of nonlinear interactive optimization techniques. The feasibility of the new algorithm has been confirmed in practical implementations. The method brings new insight on the correlation between system stability, performance, system order and the choice of the network scaling. Our method is extendible to cascaded SD as well as SD based on filter topologies.
Keywords :
CAD; analogue-digital conversion; convertors; electronic engineering computing; SD ADC; higher order; network scaling; nonlinear interactive optimization; performance criteria; sigma delta analog-to-digital converters; single loop; Algorithm design and analysis; Analog-digital conversion; Circuit stability; Circuit topology; Constraint optimization; Delta-sigma modulation; Design optimization; Filters; Network topology; Stability analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-8186-8200-0
Type :
conf
DOI :
10.1109/ICCAD.1995.480171
Filename :
480171
Link To Document :
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