• DocumentCode
    2997547
  • Title

    Improved Bioinformatics Processing Unit for Multiple Applications

  • Author

    Liu, Pei ; Hemani, Ahmed ; Paul, Kolin

  • Author_Institution
    Dept. of Electron. Syst., R. Inst. of Technol., Stockholm, Sweden
  • fYear
    2012
  • fDate
    21-25 May 2012
  • Firstpage
    390
  • Lastpage
    396
  • Abstract
    This paper presents a coarse-grain reconfigurable unit for accelerating multiple widely used bioinformatics algorithms. Our design is a highly efficient, programmable bioinformatics processing unit, called BiCell v2. Based on a specialized multimode multiplier, this unit provides three different working modes, in order to accelerate four popular bioinformatics algorithms: Maximum Likelihood based phylogenetic inference, Needleman-Wunsch, Smith-Waterman, and HMMER in sequence alignment. BiCell v2 supports both single and double precision floating-point computation, which significantly increases the accuracy for bioinformatics algorithm acceleration but retains silicon area efficiency. Making use of this improved processing unit, our platform gives about 10X speedup compared to our previous design in single-precision, and 23.2X speedup comparing with GPGPU in the same precision.
  • Keywords
    bioinformatics; floating point arithmetic; graphics processing units; maximum likelihood estimation; BiCell v2; GPGPU; HMMER sequence alignment; Needleman-Wunsch sequence alignment; Smith-Waterman sequence alignment; bioinformatics algorithm acceleration; bioinformatics algorithms; coarse-grain reconfigurable unit; double precision floating-point computation; maximum likelihood based phylogenetic inference; multimode multiplier; programmable bioinformatics processing unit; silicon area efficiency; single precision floating-point computation; working modes; Acceleration; Adders; Arrays; Bioinformatics; Phylogeny; Silicon; Bioinformatics; Coarse-Grained; HMMER; Maximum-Likelihood; Needleman-Wunsch; Phylogenetic Inference; Reconfigurable Architecture; Smith-Waterman; VLSI;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2012 IEEE 26th International
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4673-0974-5
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2012.48
  • Filename
    6270667