Toward All Optical Interconnections in Chip Multiprocessor (2)

The need to find new strategies and architectures in development of multi processors system on chip (MPSoC) makes necessary to reduce consumption while growing data transfer by increasing number of cores in one chip. This paper proposes a new configuration for an optical router on chip called ROTAR, it will study its different elements, detailing the operation of each component and their physical structure and thus by a study of wave guide losses at crossing, bends and in evanescent coupling based upon the numerical method FDTD. The use of such routers in optical network on chip (OnoC) has several benefits such as a static and simple routing algorithm and more interconnection capacity compared to λ-router [2]. This paper studies active micro resonator optical behavior and propose an algorithm performing a global estimation of all type of losses in this optical network on chip, assuming 1mm² area and use of 8*8 routers. Fat-H-Tree topology offer in optical domain many advantages, allowing to connect more cores in one chip with the same number of micro resonators compared to the same topology in electrical domain. Silicon wave guides (refraction index = 3,5) surrounded by a layer of silica (1,44) were used to achieve a strong field confinement in the wave guide.