Title :
Regular processor arrays with data-dependent dependencies
Author :
Van Egmond, Frederik E. ; Deprettere, Ed E.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Abstract :
The authors present a model for data-dependent data-flow in regular processor arrays. This model is suitable for parallel implementation of nested-loop programs in which all but a few of the dependencies are constant. The model consists of a regular data routing architecture that matches the regular architecture of the deterministic part of the nested-loop program so that they can be merged. Due to the data-dependent behavior of the router part of the architecture, this part has to operate asynchronously
Keywords :
data flow computing; multiprocessing systems; multiprocessor interconnection networks; network routing; parallel algorithms; systolic arrays; data-dependent behavior; data-dependent data-flow; model; nested-loop programs; parallel implementation; regular data routing architecture; regular processor arrays; Design methodology; Lattices; Motion estimation; Page description languages; Parallel architectures; Routing; System recovery; Systolic arrays; Telecommunication traffic;
Conference_Titel :
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location :
Veldhoven
Print_ISBN :
0-7803-0996-0
DOI :
10.1109/VLSISP.1993.404478
