Title :
Video Stream Processing on a High Performance Reconfigurable Architecture
Author :
Li, Tao ; Liu, Zhentao
Author_Institution :
Coll. of Electron. Eng., Xi´´An Univ. of Posts & Telecom, Xi´´An, China
Abstract :
A dynamically reconfigurable architecture VSP-DR1 for video processing is proposed in this paper. This architecture is derived from years of engineering video ASICs and is ideally suited to real-time video streaming. The various cells of the architecture are optimized for video post processing. The architecture, along with its video application, can be used in many real-time video applications.
Keywords :
application specific integrated circuits; reconfigurable architectures; video signal processing; video streaming; dynamically reconfigurable architecture VSP-DR1; engineering video ASIC; high performance reconfigurable architecture; real-time video application; real-time video streaming; video post processing; video stream processing; Computer architecture; Digital signal processing; Equations; Indium phosphide; Mathematical model; Pipelines; Streaming media; Dynamically reconfigurable processor; data-flow; image processing; video stream;
Conference_Titel :
Digital Image Computing Techniques and Applications (DICTA), 2011 International Conference on
Conference_Location :
Noosa, QLD
Print_ISBN :
978-1-4577-2006-2
DOI :
10.1109/DICTA.2011.72
