Title :
A New Low Power High Performance Flip-Flop
Author :
Sayed, Ahmed ; Al-Asaad, Hussain
Author_Institution :
Department of Electrical and Computer Engineering, University of California, Davis, CA, U.S.A.
Abstract :
Low power flip-flops are crucial for the design of low-power digital systems. In this paper we delve into the details of flip-flop design and optimization for low power. We compare the lowest power flip-flops reported in the literature and introduce a new flip-flop that competes with them.
Keywords :
CMOS process; CMOS technology; Circuits; Clocks; Energy consumption; Flip-flops; Integral equations; Latches; Transistors; Voltage;
Conference_Titel :
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location :
San Juan, PR
Print_ISBN :
1-4244-0172-0
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2006.382164
