• DocumentCode
    2998310
  • Title

    Building high performance signal processors cheaply and quickly

  • Author

    Owens, Robert M. ; Kelliher, Thomas P. ; Irwin, Mary Jane

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Penn State Univ., University Park, PA, USA
  • fYear
    1993
  • fDate
    20-22 Oct 1993
  • Firstpage
    251
  • Lastpage
    259
  • Abstract
    The authors put forward the argument that it is quite feasible to rapidly design and build high performance signal processors on a modest budget. To illustrate the point, they offer the Micro-Grain Array Processor (MGAP). The design methodology behind the MGAP is examined. Briefly, the low cost and fast implementation time result from: using off-the-shelf parts wherever possible, using programmable parts wherever possible, and using conservative design techniques wherever possible. For those parts of the system where more aggressive design techniques are required, comprehensive simulation is performed. The MGAP is a flexible, fine grained array processor which fits onto a single 9U × 400mm VME board. The current PGA implementation of the processor array (128 × 128 processors) will place nearly a teraop of computing performance upon a desktop. The flexibility of the architecture allows one to target numerous applications including: signal and image processing, graph problems, sorting and searching, matrix computations, problems of astronomy, and computational biology
  • Keywords
    CMOS digital integrated circuits; VLSI; digital signal processing chips; integrated circuit design; logic CAD; multiprocessing systems; parallel algorithms; CMOS technology; Micro-Grain Array Processor; PGA implementation; VLSI; VME board; design methodology; fast implementation time; fine grained array processor; flexible; high performance signal processors; low cost; programmable parts; rapid building; rapid design; simulation; Biology computing; Buildings; Computational modeling; Computer architecture; Costs; Design methodology; Electronics packaging; Image processing; Signal design; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Signal Processing, VI, 1993., [Workshop on]
  • Conference_Location
    Veldhoven
  • Print_ISBN
    0-7803-0996-0
  • Type

    conf

  • DOI
    10.1109/VLSISP.1993.404481
  • Filename
    404481