DocumentCode
2998686
Title
Standard testability bus-an applications example
Author
Turino, J.
Author_Institution
Logical Solutions Technol. Inc., Campbell, CA
fYear
1990
fDate
13-15 Feb 1990
Firstpage
66
Abstract
An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting
Keywords
automatic test equipment; automatic testing; computer interfaces; fault location; logic design; logic testing; production testing; random-access storage; ATE; automatic test system; capital equipment cost; design verification; factory testing; fault simulation; field testing; logic testing; multiple printed circuit boards; on-board RAM; standard testability bus; system-level testability specifications; troubleshooting; virtual probes; visibility circuits; Automatic logic units; Automatic testing; Circuit faults; Circuit testing; Costs; Logic design; Logic testing; Printed circuits; Reconfigurable logic; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 1990. IMTC-90. Conference Record., 7th IEEE
Conference_Location
San Jose, CA
Type
conf
DOI
10.1109/IMTC.1990.65961
Filename
65961
Link To Document