Parasitic-Aware and Moment-driven Constraint Satisfying Non-Linear Routing Methodology

Accounting for the inductive and capacitive parasitics is important for the routing of long multi-chip module (MCM) nets in multi-GHz designs. The step signal response of a high frequency signal applied at one end of a long net suffers from signal oscillations (ringing) in the form of overshoots and undershoots. While a sharp overshoot may damage the gate oxide due to an increase in the voltage level, an undershoot might pull the signal below the switching threshold causing logic failure. Unnecessary ringing may cause the rise time of the signal to be sharp, but the settling time may increase, thereby increasing the effective delay. We propose a non-linear problem (NLP) based routing methodology, which finds a routing solution considering the effect of coupling capacitive and mutual inductive effects along with the self parasitics using a moment-driven cost function. The objective is to minimize the cost, obtain a ringing-delay trade-off and satisfy the design rules.