Negative bias temperature instabilities in HfSiON/TaN-based pMOSFETs

Negative bias temperature instabilities (NBTI) in devices with SiO_x/HfSiON stacks and TaN gates is reported, for different SiO₂/HfO₂ compositions, for stacks with same physical thickness (t_phys) and same equivalent oxide thickness (EOT). It is shown that V_th shifts increase with time like power laws, ΔV_th=At^α, like in SiO₂ and SiON-based devices. When comparing AV_th shifts for same t_phys, it is found that NBTI increases with increased HfO₂ content. On the other hand, comparison of V_th shifts for devices with comparable EOT indicates that an optimal HfO₂ content, around 53%, results in minimal NBTI. These results can be qualitatively explained by the reaction-diffusion model. The power law exponent α is shown to decrease with increasing amount of HfO₂. This finding has an important impact on the extrapolation of the device lifetime at operating conditions, which is found to be similar for layers with HfO₂ compositions in the range 53-100 %.