• DocumentCode
    2998936
  • Title

    A cascadable multimode VLSI signal processor

  • Author

    Barazesh, B. ; Mary, L.

  • Author_Institution
    Télécommunications Radioélectriques et Téléphoniques, LePlessis-Robinson, France
  • Volume
    11
  • fYear
    1986
  • fDate
    31503
  • Firstpage
    2171
  • Lastpage
    2174
  • Abstract
    The purpose of this paper is to present the PSI, a fast 16/32 bit VLSI microcomputer for digital signal processing. The PSI proposes innovative architectural solutions to fit the high throughput requirements of complex algorithms. The multimode internal architecture matches the inherent parallelism of the algorithms and the external architecture allows to wire directly several processors together with external peripheral and memory chips. This multiprocessor architecture behaves as a data flow machine. A few examples of the kernel algorithms are presented and system architectures based on the PSI are described in some detail.
  • Keywords
    Circuits; Computer architecture; Kernel; Microcomputers; Microprocessors; Signal processing; Signal processing algorithms; Silicon; Software standards; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '86.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1986.1168630
  • Filename
    1168630