A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T

In this paper, we propose a new, reconfigurable algorithm for signal demapping: MUSCOD algorithm, used in DVB-T (Digital Video Broadcasting, Terrestrial version) receivers. The MUSCOD algorithm/architecture supports both hierarchical and nonhierarchical transmission modes. It implements different modulation schemes supported by the standard. We also propose a high-performance, reconfigurable symbol and bit deinterleaver working in conjuction with the demapper. We implement the proposed architecture using 0.6 μm 3.3 V CMOS technology. The proposed architecture requires a system clock frequency of 36.57 MHz. It has a maximum throughput of 40.5 Mbits/s and dissipates 0.3 W