DocumentCode :
2999309
Title :
Hardware Implementation of Cellular Automata on Systolic Array
Author :
Yarahmadi, Ali ; Moarefi, Nazanin ; Setayeshi, Saeed
Author_Institution :
Dept. of Comput., Islamic Azad Univ., Doroud, Iran
fYear :
2011
fDate :
March 30 2011-April 1 2011
Firstpage :
426
Lastpage :
429
Abstract :
Cellular Automata is one of the ways of performing computations which necessitates extremely the processing of data at high speeds. Implementing cellular automata on serial bases does not provide the required speed. Conventional processors can´t process this enormous amount of data in a short period of time, so a new approach is required to improve computational complexity. Systolic array is a kind of parallel processing approaches which can increase the processing speed. Because processors of systolic set can work simultaneously and have its own local memory, they can improve the processing speed by limiting the number of external memory access in order to execute each of their instructions. This article studies implementing cellular automata on systolic arrays. To do so, once implementing is done by serial base, the other is done by using systolic arrays. The speed of the two methods has been compared with each other, too.
Keywords :
cellular automata; parallel memories; parallel processing; systolic arrays; cellular automata; computational complexity; data processing; external memory access; hardware implementation; local memory; parallel processing; processing speed; systolic array; Arrays; Automata; Computational modeling; Computers; Memory management; Program processors; Cellular Automata; Implementation of Cellular Automata; Systolic Array;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Modelling and Simulation (UKSim), 2011 UkSim 13th International Conference on
Conference_Location :
Cambridge
Print_ISBN :
978-1-61284-705-4
Electronic_ISBN :
978-0-7695-4376-5
Type :
conf
DOI :
10.1109/UKSIM.2011.87
Filename :
5754258
Link To Document :
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