DocumentCode
2999490
Title
Acceleration of mincut partitioning using hardware CAD accelerator TP5000
Author
San, Masahiro ; Shimogori, Shintaro ; Hirose, Fumiyasu
Author_Institution
CAD Group, Fujitsu Labs. Ltd., Kawasaki, Japan
fYear
1997
fDate
28-31 Jan 1997
Firstpage
61
Lastpage
64
Abstract
This paper presents a new approach of data pipelining for mincut partitioning acceleration using a parallel computer. We choose the hardware CAD accelerator TP5000 to implement our approach. We obtain a speed improvement of 20 to 25 times as fast as a SPARCStation-10 by using 10 processors in the TP5000
Keywords
VLSI; circuit layout CAD; circuit optimisation; coprocessors; logic partitioning; parallel machines; pipeline processing; SPARCStation-10; TP5000; data pipelining; hardware CAD accelerator; mincut partitioning; parallel computer; Acceleration; Concurrent computing; Design automation; Hardware; Laboratories; Partitioning algorithms; Pipeline processing; Signal design; Tin; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location
Chiba
Print_ISBN
0-7803-3662-3
Type
conf
DOI
10.1109/ASPDAC.1997.600059
Filename
600059
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