An Area-Efficient CMOS Current-Mode Phase-Locked Loop

This paper introduces a new architecture of phase-locked loops called current-mode phase-locked loops. The proposed phase-locked loop removes the need for a charge pump and a RC loop filter as conventional voltage-mode phase- locked loops, eliminating the design difficulties including current mismatches of charge pumps and large silicon area requirement of the RC loop filter. Instead, the proposed current-mode phase- locked loop utilizes a current-mode RL loop filter with CMOS active inductors to provide the desired control current to the downstream current-controlled oscillator. A modified bang-bang phase/frequency detector that converts the phase difference between the incoming digital waveform and the local clock into a binary signal is proposed. A current-reuse current-controlled oscillator is also developed. Simulation results demonstrates that the proposed current-mode phase-locked loop provides an significantly reduced lock time as compared with the corresponding voltage-mode phase-locked loop with approximately 90% silicon area reduction.