Double SiGe:C diffusion barrier channel 40nm CMOS with improved short-channel performances

The beneficial effect of double SiGe:C diffusion barriers for CMOS device downscaling is clearly demonstrated. The diffusion barriers enable to finely tailor the doping profile both in the channel and S/D regions. A drastic reduction of short channel effects down to 35nm gate length and improved I_on/I_off compromise have been achieved with a double carbonated barrier architecture for both nMOS and pMOS. For pMOS, reduced junction depth and lower S/D region sheet resistance are achieved with highly LDD and HDD retrograde doping profiles thanks to limited boron diffusion. For nMOS, we evidence that carbonated epi multi-layers suppress the boron pockets diffusion and therefore the roll-off effect in short gate length devices due to localised over-doping.