DocumentCode :
3001505
Title :
Implant damage and gate-oxide-edge effects on product reliability
Author :
Lee, Yung-Huei ; Nachman, Ramez ; Hu, Sam ; Mielke, Neal ; Liu, Jonathan
Author_Institution :
Intel Corp., California Technol. & Manuf., Santa Clara, CA, USA
fYear :
2004
fDate :
13-15 Dec. 2004
Firstpage :
481
Lastpage :
484
Abstract :
This work investigated the effects of thin-gate oxide edge damage on logic product reliability. For this, we used different poly profiles to quantify the thin-gate oxide edge damage. Device/Process simulation was also conducted to explain the interaction of implant and poly shape with the gate oxide reliability. Poly with foot showed degraded oxide reliability, because it allows high-energy implant to penetrate through the edge of the gate oxide causing oxide damage and hence failures during product burn-in. The problem is more pronounced on nMOST due to its stronger sensitivity to the voltage stress and the specific implant species as compared to pMOST. Circuit simulation was also conducted to characterize the circuit sensitivity on oxide leakage and to explain the observed product burn-in fallout.
Keywords :
circuit simulation; crystal defects; failure analysis; integrated circuit reliability; semiconductor device breakdown; semiconductor doping; semiconductor process modelling; circuit sensitivity; circuit simulation; device/process simulation; gate oxide reliability; gate-oxide-edge effects; high-energy implant; implant damage; logic product reliability; nMOST; oxide leakage; poly shape; product burn-in fallout; thin-gate oxide edge damage; voltage stress; Circuit simulation; Degradation; Electric breakdown; Foot; Implants; Microprocessors; Oxidation; Shape; Stress; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN :
0-7803-8684-1
Type :
conf
DOI :
10.1109/IEDM.2004.1419194
Filename :
1419194
Link To Document :
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