The effects of TaN thickness and strained substrate on the performance and PBTI characteristics of poly-Si/TaN/HfSiON MOSFETs

Author

Cho, H.J. ; Lee, H.L. ; Park, S.G. ; Park, H.B. ; Jeon, T.S. ; Jin, B.J. ; Kang, S.B. ; Lee, S.G. ; Kim, Y.P. ; Jung, I.S. ; Lee, J.W. ; Shin, Y.G. ; Chung, U.I. ; Moon, J.T. ; Choi, J.H. ; Jeong, Y.S.

Author_Institution

Semicond. R&D Center, Samsung Electron., Kyunggi-Do, South Korea

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

503

Lastpage

506

Abstract

The effects of TaN metal-gate thickness on the electrical characteristics of poly-Si/metal-gate/HfSiON MOSFETs have been investigated. Too thin TaN was reactive with poly-Si gate, which led to the formation of Si-doped metal gate. As a result, the work function of the metal gate was reduced and the capacitance increased while generating traps in HfSiON films. P-MOSFET using poly-Si/TaN gate with channel engineering in strained-Si substrate showed threshold voltage of - 0.45 V at W/L= 10/1 μm and improved MOSFET characteristics.

Keywords

MOSFET; hafnium compounds; silicon; silicon compounds; substrates; tantalum compounds; work function; MOSFET; PBTI characteristics; Si-TaN-HfSiON; Si-doped metal gate; TaN thickness; channel engineering; electrical characteristics; metal-gate thickness; poly-Si gate; strained substrate; work function; Annealing; Boron; Chemical vapor deposition; Dielectric substrates; Electric variables; High K dielectric materials; High-K gate dielectrics; MOSFETs; Plasma temperature; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International

Print_ISBN

0-7803-8684-1

Type

conf

DOI

10.1109/IEDM.2004.1419201

Filename

1419201