DocumentCode
3001919
Title
Behavioral synthesis of asynchronous systems: a methodology
Author
Dedou, Joseph Okito ; Chillet, Daniel ; Sentieys, Olivier
Author_Institution
LASTI, Rennes I Univ., France
Volume
6
fYear
1999
fDate
36342
Firstpage
370
Abstract
In asynchronous system, initiation and completion of operations are events that can occur at any instant and the execution time is data dependent. Thus if an asynchronous timing model is considered, we can provide scheduling and resource allocation methods which will have a significant impact on the performance and the area of the final implementation. Until now the different methods proposed for high-level synthesis (HLS) do not apply to the above topics. This paper proposes a methodology for the scheduling of asynchronous systems. It is based on the average delay
Keywords
asynchronous circuits; delays; high level synthesis; resource allocation; scheduling; timing; Breizh synthesis; asynchronous systems; asynchronous timing model; average delay; behavioral synthesis; completion; execution time; high-level synthesis; initiation; resource allocation; scheduling; Adders; Circuits; Clocks; Delay effects; Delay estimation; High level synthesis; Logic; Processor scheduling; Signal synthesis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.780172
Filename
780172
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