Norma: A hierarchical interconnection architecture for Network on Chip

NoC is a potent solution to address design complexity and productivity problems whose its key component is the interconnect architecture which directly affects both cost and performance parameters. The purpose of this paper is to present the basic ideas behind the development of our new hierarchical network-on-chip (NoC) architecture, called ldquoNormardquo that its most distinguished characteristic is its hierarchical nature. We present two types of Norma, Norma-I and Norma-II which have been compared to 2D Mesh. Results illustrate that Norma-I and Norma-II have far more proper functionality than 2D Mesh, when 75 percent of whole traffic interacts in each subnet.