Large scale integration and reliability consideration of triple gate transistors

Author

Choi, Jung A. ; Lee, Kwon ; Jin, You Seung ; Lee, Yong Jun ; Lee, Soo Yong ; Lee, Geon Ung ; Lee, Seung Hwan ; Sun, Min Chul ; Kim, Dong Chan ; Lee, Young Mi ; Bae, Su Gon ; Yang, Jeong Hwan ; Maeda, Shigenobu ; Lee, Nae-In ; Kang, Ho-Kyu ; Suh, Kwang Pyu

Author_Institution

Syst. LSI Div., Samsung Electron. Co., Ltd. Yongin, South Korea

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

647

Lastpage

650

Abstract

Large scale integration and reliability of triple gate FETs (TG-FETs) are investigated. The SRAM chip composed of TG-FETs demonstrated 20Mbits of working cells, and 45° rotated TG-FET is found to be superior from reliability perspective. Future TG-FET design is proposed, utilizing technologies including alternating phase shift mask lithography, local-interconnects and metal gate/undoped channel.

Keywords

SRAM chips; field effect transistors; integrated circuit interconnections; large scale integration; phase shifting masks; photolithography; semiconductor device reliability; 20 Mbit; SRAM chip; alternating phase shift mask lithography; large scale integration; local-interconnects; metal gate; reliability consideration; triple gate FET; triple gate transistors; undoped channel; CMOS technology; Electronic equipment testing; Epitaxial growth; Fabrication; Implants; Large scale integration; MOS devices; Random access memory; SRAM chips; Sun;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International

Print_ISBN

0-7803-8684-1

Type

conf

DOI

10.1109/IEDM.2004.1419249

Filename

1419249